;------------------------------------------------------------------------------ ; nRF9E5 device file for asx8051/aslink ;------------------------------------------------------------------------------ ; compiled by mazzoo [at] mazzoo.de ; licensed under GPL v2 ;------------------------------------------------------------------------------ ; registers r0-r7 ;------------------------------------------------------------------------------ R0 = 0x00 R1 = 0x01 R2 = 0x02 R3 = 0x03 R4 = 0x04 R5 = 0x05 R6 = 0x06 R7 = 0x07 ;------------------------------------------------------------------------------ ; BYTE SFRs (special function registers) ; (SFRs, 0x80-0xff, addressable only ) ;------------------------------------------------------------------------------ ; ; ,---- B marks bit-addressable registers ; v P0 = 0x80;B; P0(3) Port 0 SP = 0x81 ; SP Stack pointer DPL0 = 0x82 ; DPL0 Data pointer 0, low byte DPH0 = 0x83 ; DPH0 Data pointer 0, high byte DPL1 = 0x84 ; DPL1 Data pointer 1, low byte DPH1 = 0x85 ; DPH1 Data pointer 1, high byte DPS = 0x86 ; DPS(1) 0 0 0 0 0 0 0 SEL PCON = 0x87 ; PCON SMOD ­1 1 GF1 GF0 STOP IDLE TCON = 0x88;B; TCON TF1 TR1 TF0 TR0 IE1 IT1 IE0 IT0 TMOD = 0x89 ; TMOD GATE C/T M1 M0 GATE C/T M1 M0 TL0 = 0x8A ; TL0 Timer/counter 0 value, low byte TL1 = 0x8B ; TL1 Timer/counter 1 value, low byte TH0 = 0x8C ; TH0 Timer/counter 0 value, high byte TH1 = 0x8D ; TH1 Timer/counter 1 value, high byte CKCON = 0x8E ; CKCON(1) - ­ T2M T1M T0M MD2 MD1 MD0 SPC_FNC = 0x8F ; SPC_FNC(1) 0 0 0 0 0 0 0 WRS P1 = 0x90;B; P1(3) ­Port 1 bit 3:0 EXIF = 0x91 ; EXIF(1) IE5 IE4 IE3 IE2 1 0 0 0 MPAGE = 0x92 ; MPAGE(1) ­ P0_DRV = 0x93 ; P0_DRV(2) Drive Strength of port 0 P0_DIR = 0x94 ; P0_DIR(2) Direction of Port 0 P0_ALT = 0x95 ; P0_ALT(2) Alternate functions of Port 0 P1_DIR = 0x96 ; P1_DIR(2) ­Direction of Port 1 P1_ALT = 0x97 ; P1_ALT(2) ­Alt. funct.of Port 1 SCON = 0x98;B; SCON SM0 SM1 SM2 REN TB8 RB8 TI RI SBUF = 0x99 ; SBUF Serial port data buffer P2 = 0xA0;B; P2(3) AM CD DR/ TRX_CE EOC/ TX_EN RACSN SBMISO SBMOSI SBSCK IE = 0xA8;B; IE EA 0 ET2 ES ET1 EX1 ET0 EX0 PWMCON = 0xA9 ; PWMCON(2) PWM_LENGTH PWM_PRESCALE PWMDUTY = 0xAA ; PWMDUTY(2) PWM_DUTY_CYCLE REGX_MSB = 0xAB ; REGX_MSB(2) High byte of Watchdog/RTC register REGX_LSB = 0xAC ; REGX_LSB(2) Low byte of Watchdog/RTC register REGX_CTRL = 0xAD ; REGX_CTRL(2) ­Control of REGX_MSB and REGX_LSB RSTREAS = 0xB1 ; RSTREAS(2) ­RFLR SPI_DATA = 0xB2 ; SPI_DATA(2) SPI_DATA input/output bits SPI_CTRL = 0xB3 ; SPI_CTRL(2) ­SPI_ CTRL SPICLK = 0xB4 ; SPICLK(2) ­SPICLK TICK_DV = 0xB5 ; TICK_DV(2) TICK_DV CK_CTRL = 0xB6 ; CK_CTRL(2) ­CK_ CTRL IP = 0xB8;B; IP 1 0 PT2 PS PT1 PX1 PT0 PX0 CKLFCON = 0xBF ; CKLFCON (2) - - XOF[5.3] UP_CLK_EN UP_CLK_FREQ[1.0] T2CON = 0xC8;B; T2CON TF2 EXF2 RCLK TCLK EXEN2 TR2 C/T2 CP/RL2 RCAP2L = 0xCA ; RCAP2L Timer/counter 2 capture or reload, low byte RCAP2H = 0xCB ; RCAP2H Timer/counter 2 capture or reload, high byte TL2 = 0xCC ; TL2 Timer/counter 2 value, low byte TH2 = 0xCD ; TH2 Timer/counter 2 value, high byte PSW = 0xD0;B; PSW CY AC F0 RS1 RS0 OV F1 P EICON = 0xD8;B; EICON(1) - 1 0 0 WDTI 0 0 0 ACC = 0xE0;B; ACC Accumulator register EIE = 0xE8;B; EIE(1) 1 1 1 EWDI EX5 EX4 EX3 EX2 B = 0xF0;B; B B-register EIP = 0xF8;B; EIP(1) 1 1 1 PWDI PX5 PX4 PX3 PX2 HWREV = 0xFE ; HWREV (2) Device hardware revision number ; = 0xFF ; ----- Reserved, do not use ; BIT registers (SFR addresses ending in 0h or 8h are bit-addressable) ;------------------------------------------------------------------------------ ;/* BIT Registers */ ;/* P0 */ P0_0 = 0x80; DIO2 = 0x80; P0_1 = 0x81; RXD = 0x81; DIO3 = 0x81; P0_2 = 0x82; TXD = 0x82; DIO4 = 0x82; P0_3 = 0x83; INT0_N = 0x83; DIO5 = 0x83; P0_4 = 0x84; INT1_N = 0x84; DIO6 = 0x84; P0_5 = 0x85; T0 = 0x85; DIO7 = 0x85; P0_6 = 0x86; T1 = 0x86; DIO8 = 0x86; P0_7 = 0x87; PWM = 0x87; DIO9 = 0x87; ;/* TCON */ IT0 = 0x88; IE0 = 0x89; IT1 = 0x8A; IE1 = 0x8B; TR0 = 0x8C; TF0 = 0x8D; TR1 = 0x8E; TF1 = 0x8F; ;/* P1 */ P1_0 = 0x90; T2 = 0x90; DIO0 = 0x90; P1_1 = 0x91; DIO1 = 0x91; P1_2 = 0x92; DIN0 = 0x92; ;/* SCON */ RI = 0x98; TI = 0x99; RB8 = 0x9A; TB8 = 0x9B; REN = 0x9C; SM2 = 0x9D; SM1 = 0x9E; SM0 = 0x9F; ;/* P2 */ P2_0 = 0xA0; DATA = 0xA0; P2_1 = 0xA1; CLK1 = 0xA1; P2_2 = 0xA2; DR1 = 0xA2; P2_3 = 0xA3; CS = 0xA3; RACSN = 0xA3; P2_4 = 0xA4; DOUT2 = 0xA4; TXEN = 0xA4; TX_EN = 0xA4; P2_5 = 0xA5; CLK2 = 0xA5; TRX_CE = 0xA5; DR = 0xA5; P2_6 = 0xA6; DR2_CE = 0xA6; DR2 = 0xA6; CE = 0xA6; CD = 0xA6; P2_7 = 0xA7; ;PWR_UP = 0xA7; FIXME how came this here? AM = 0xA7; ;/* IE */ EX0 = 0xA8; ET0 = 0xA9; EX1 = 0xAA; ET1 = 0xAB; ES = 0xAC; ET2 = 0xAD; EA = 0xAF; ;/* IP */ PX0 = 0xB8; PT0 = 0xB9; PX1 = 0xBA; PT1 = 0xBB; PS = 0xBC; PT2 = 0xBD; ;/* T2CON */ CP_RL2 = 0xC8; CPRL2 = 0xC8; C_T2 = 0xC9; CT2 = 0xC9; TR2 = 0xCA; EXEN2 = 0xCB; TCLK = 0xCC; RCLK = 0xCD; EXF2 = 0xCE; TF2 = 0xCF; ;/* PSW */ P = 0xD0; F1 = 0xD1; OV = 0xD2; RS0 = 0xD3; RS1 = 0xD4; F0 = 0xD5; AC = 0xD6; CY = 0xD7; ;/* EICON */ WDTI = 0xDB; ;/* ACC */ ACC_0 = 0xE0; ACC.0 = 0xE0; A_0 = 0xE0; A.0 = 0xE0; A0 = 0xE0; ACC_1 = 0xE1; ACC.1 = 0xE1; A_1 = 0xE1; A.1 = 0xE1; A1 = 0xE1; ACC_2 = 0xE2; ACC.2 = 0xE2; A_2 = 0xE2; A.2 = 0xE2; A2 = 0xE2; ACC_3 = 0xE3; ACC.3 = 0xE3; A_3 = 0xE3; A.3 = 0xE3; A3 = 0xE3; ACC_4 = 0xE4; ACC.4 = 0xE4; A_4 = 0xE4; A.4 = 0xE4; A4 = 0xE4; ACC_5 = 0xE5; ACC.5 = 0xE5; A_5 = 0xE5; A.5 = 0xE5; A5 = 0xE5; ACC_6 = 0xE6; ACC.6 = 0xE6; A_6 = 0xE6; A.6 = 0xE6; A6 = 0xE6; ACC_7 = 0xE7; ACC.7 = 0xE7; A_7 = 0xE7; A.7 = 0xE7; A7 = 0xE7; ;/* EIE */ EX2 = 0xE8; EX3 = 0xE9; EX4 = 0xEA; EX5 = 0xEB; EWDI = 0xEC; ;/* EIP */ PX2 = 0xF8; PX3 = 0xF9; PX4 = 0xFA; PX5 = 0xFB; PWDI = 0xFC; ; more general purpose bit registers ;------------------------------------------------------------------------------ BIT0 = 0x20 BIT0_0 = 0x00 BIT0_1 = 0x01 BIT0_2 = 0x02 BIT0_3 = 0x03 BIT0_4 = 0x04 BIT0_5 = 0x05 BIT0_6 = 0x06 BIT0_7 = 0x07 BIT1 = 0x21 BIT1_0 = 0x08 BIT1_1 = 0x09 BIT1_2 = 0x0a BIT1_3 = 0x0b BIT1_4 = 0x0c BIT1_5 = 0x0d BIT1_6 = 0x0e BIT1_7 = 0x0f BIT2 = 0x22 BIT2_0 = 0x10 BIT2_1 = 0x11 BIT2_2 = 0x12 BIT2_3 = 0x13 BIT2_4 = 0x14 BIT2_5 = 0x15 BIT2_6 = 0x16 BIT2_7 = 0x17 BIT3 = 0x23 BIT3_0 = 0x18 BIT3_1 = 0x19 BIT3_2 = 0x1a BIT3_3 = 0x1b BIT3_4 = 0x1c BIT3_5 = 0x1d BIT3_6 = 0x1e BIT3_7 = 0x1f BIT4 = 0x24 BIT4_0 = 0x20 BIT4_1 = 0x21 BIT4_2 = 0x22 BIT4_3 = 0x23 BIT4_4 = 0x24 BIT4_5 = 0x25 BIT4_6 = 0x26 BIT4_7 = 0x27 BIT5 = 0x25 BIT5_0 = 0x28 BIT5_1 = 0x29 BIT5_2 = 0x2a BIT5_3 = 0x2b BIT5_4 = 0x2c BIT5_5 = 0x2d BIT5_6 = 0x2e BIT5_7 = 0x2f BIT6 = 0x26 BIT6_0 = 0x30 BIT6_1 = 0x31 BIT6_2 = 0x32 BIT6_3 = 0x33 BIT6_4 = 0x34 BIT6_5 = 0x35 BIT6_6 = 0x36 BIT6_7 = 0x37 BIT7 = 0x27 BIT7_0 = 0x38 BIT7_1 = 0x39 BIT7_2 = 0x3a BIT7_3 = 0x3b BIT7_4 = 0x3c BIT7_5 = 0x3d BIT7_6 = 0x3e BIT7_7 = 0x3f BIT8 = 0x28 BIT8_0 = 0x40 BIT8_1 = 0x41 BIT8_2 = 0x42 BIT8_3 = 0x43 BIT8_4 = 0x44 BIT8_5 = 0x45 BIT8_6 = 0x46 BIT8_7 = 0x47 BIT9 = 0x29 BIT9_0 = 0x48 BIT9_1 = 0x49 BIT9_2 = 0x4a BIT9_3 = 0x4b BIT9_4 = 0x4c BIT9_5 = 0x4d BIT9_6 = 0x4e BIT9_7 = 0x4f BITA = 0x2a BITA_0 = 0x50 BITA_1 = 0x51 BITA_2 = 0x52 BITA_3 = 0x53 BITA_4 = 0x54 BITA_5 = 0x55 BITA_6 = 0x56 BITA_7 = 0x57 BITB = 0x2b BITB_0 = 0x58 BITB_1 = 0x59 BITB_2 = 0x5a BITB_3 = 0x5b BITB_4 = 0x5c BITB_5 = 0x5d BITB_6 = 0x5e BITB_7 = 0x5f BITC = 0x2c BITC_0 = 0x60 BITC_1 = 0x61 BITC_2 = 0x62 BITC_3 = 0x63 BITC_4 = 0x64 BITC_5 = 0x65 BITC_6 = 0x66 BITC_7 = 0x67 BITD = 0x2d BITD_0 = 0x68 BITD_1 = 0x69 BITD_2 = 0x6a BITD_3 = 0x6b BITD_4 = 0x6c BITD_5 = 0x6d BITD_6 = 0x6e BITD_7 = 0x6f BITE = 0x2e BITE_0 = 0x70 BITE_1 = 0x71 BITE_2 = 0x72 BITE_3 = 0x73 BITE_4 = 0x74 BITE_5 = 0x75 BITE_6 = 0x76 BITE_7 = 0x77 BITF = 0x2f BITF_0 = 0x78 BITF_1 = 0x79 BITF_2 = 0x7a BITF_3 = 0x7b BITF_4 = 0x7c BITF_5 = 0x7d BITF_6 = 0x7e BITF_7 = 0x7f ;------------------------------------------------------------------------------ ; SPI interface ;------------------------------------------------------------------------------ ; SPI instruction set ;------------------------------------------------------------------------------ ; write configuration register SPI_WRC = 0x00 SPI_WRC0 = 0x00 SPI_WRC1 = 0x01 SPI_WRC2 = 0x02 SPI_WRC3 = 0x03 SPI_WRC4 = 0x04 SPI_WRC5 = 0x05 SPI_WRC6 = 0x06 SPI_WRC7 = 0x07 SPI_WRC8 = 0x08 SPI_WRC9 = 0x09 SPI_WRCa = 0x0a SPI_WRCb = 0x0b SPI_WRCc = 0x0c SPI_WRCd = 0x0d SPI_WRCe = 0x0e SPI_WRCf = 0x0f W_RF_CONFIG = 0x00 W_RF_CONFIG0 = 0x00 W_RF_CONFIG1 = 0x01 W_RF_CONFIG2 = 0x02 W_RF_CONFIG3 = 0x03 W_RF_CONFIG4 = 0x04 W_RF_CONFIG5 = 0x05 W_RF_CONFIG6 = 0x06 W_RF_CONFIG7 = 0x07 W_RF_CONFIG8 = 0x08 W_RF_CONFIG9 = 0x09 W_RF_CONFIGa = 0x0a W_RF_CONFIGb = 0x0b W_RF_CONFIGc = 0x0c W_RF_CONFIGd = 0x0d W_RF_CONFIGe = 0x0e W_RF_CONFIGf = 0x0f ; read configuration register SPI_RRC = 0x10 SPI_RRC0 = 0x10 SPI_RRC1 = 0x11 SPI_RRC2 = 0x12 SPI_RRC3 = 0x13 SPI_RRC4 = 0x14 SPI_RRC5 = 0x15 SPI_RRC6 = 0x16 SPI_RRC7 = 0x17 SPI_RRC8 = 0x18 SPI_RRC9 = 0x19 SPI_RRCa = 0x1a SPI_RRCb = 0x1b SPI_RRCc = 0x1c SPI_RRCd = 0x1d SPI_RRCe = 0x1e SPI_RRCf = 0x1f R_RF_CONFIG = 0x10 R_RF_CONFIG0 = 0x10 R_RF_CONFIG1 = 0x11 R_RF_CONFIG2 = 0x12 R_RF_CONFIG3 = 0x13 R_RF_CONFIG4 = 0x14 R_RF_CONFIG5 = 0x15 R_RF_CONFIG6 = 0x16 R_RF_CONFIG7 = 0x17 R_RF_CONFIG8 = 0x18 R_RF_CONFIG9 = 0x19 R_RF_CONFIGa = 0x1a R_RF_CONFIGb = 0x1b R_RF_CONFIGc = 0x1c R_RF_CONFIGd = 0x1d R_RF_CONFIGe = 0x1e R_RF_CONFIGf = 0x1f ; write Tx payload SPI_WTP = 0x20 W_TX_PAYLOAD = 0x20 ; read Tx payload SPI_RTP = 0x21 R_TX_PAYLOAD = 0x21 ; write Tx address SPI_WTA = 0x22 W_TX_ADDRESS = 0x22 ; read Tx address SPI_RTA = 0x23 R_TX_ADDRESS = 0x23 ; read Rx payload SPI_RRP = 0x24 R_RX_PAYLOAD = 0x24 ; read ADC data SPI_RAD = 0x40 R_ADC_DATA = 0x40 SPI_RAD0 = 0x40 R_ADC_DATA0 = 0x40 SPI_RAD1 = 0x41 R_ADC_DATA1 = 0x41 ; write ADC configuration SPI_WAC = 0x44 W_ADC_CONFIG = 0x44 ; read ADC configuration SPI_RAC = 0x46 R_ADC_CONFIG = 0x46 ; special command for fast setting of CH_NO SPI_CC = 0x80 ; see Table21 chapter 11 in nRF9E5rev1_2.pdf CHANNEL_CONFIG = 0x80 ; see Table21 chapter 11 in nRF9E5rev1_2.pdf ; special command for start of an ADC conversion SPI_SAV = 0xc0 ; see Table21 chapter 11 in nRF9E5rev1_2.pdf START_ADC_CONV = 0xc0 ; see Table21 chapter 11 in nRF9E5rev1_2.pdf ;------------------------------------------------------------------------------